DocumentCode
2960428
Title
High-Efficiency CMOS Charge Pump
Author
Gobbi, L. ; Cabrini, A. ; Torelli, G.
Author_Institution
Univ. of Pavia, Pavia
fYear
2006
fDate
10-13 Dec. 2006
Firstpage
724
Lastpage
727
Abstract
A charge pump topology with enhanced driving capability for very low voltage applications is presented. The proposed scheme is able to operate with a supply voltage as low as 900 mV and ensures high voltage gain, high driving capability, and high power efficiency over the whole current range. A suitable boosting circuit allows adequately low on-resistance of transfer devices while still limiting the impact of parasitic capacitances. Simulation results show the effectiveness of the proposed approach.
Keywords
CMOS integrated circuits; low-power electronics; network topology; power convertors; voltage regulators; CMOS charge pump circuits; boosting circuit; parasitic capacitance; power efficiency; transfer devices; voltage 900 mV; voltage gain; Capacitors; Charge pumps; Charge transfer; Circuit topology; Elevators; Flash memory; Low voltage; Parasitic capacitance; Switches; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location
Nice
Print_ISBN
1-4244-0395-2
Electronic_ISBN
1-4244-0395-2
Type
conf
DOI
10.1109/ICECS.2006.379891
Filename
4263469
Link To Document