Performance of ADC for use in mixed-signal control of synchronous rectifiers in current-type resonant converters

Timing of synchronous rectifier (SR) gating signals for resonant converters in low voltage applications is of paramount importance if high efficiency is to be maintained. Further, to operate at frequencies in the megahertz range, the problems associated with layout parasitics, and individual integrated circuit (IC) delays must be mitigated through the implementation of Power application specific integrated circuits (PASICs). In this paper, a mixed-signal SR control scheme suitable for PASIC implementation is presented as the basis for designing a threshold inverter quantization (TIQ) flash analog-digital converter (ADC). The operation and design of a TIQ flash ADC is reviewed, and compared to a standard flash ADC. Simulated and analytical results comparing area and power consumption metrics of the flash topologies is presented to merit the use of a TIQ ADC in the SR PASIC design.