DocumentCode :
2960898
Title :
SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor
Author :
Khan, M.M. ; Lester, D.R. ; Plana, L.A. ; Rast, A. ; Jin, X. ; Painkras, E. ; Furber, S.B.
Author_Institution :
Sch. of Comput. Sci., Univ. of Manchester, Manchester
fYear :
2008
fDate :
1-8 June 2008
Firstpage :
2849
Lastpage :
2856
Abstract :
SpiNNaker is a novel chip - based on the ARM processor - which is designed to support large scale spiking neural networks simulations. In this paper we describe some of the features that permit SpiNNaker chips to be connected together to form scalable massively-parallel systems. Our eventual goal is to be able to simulate neural networks consisting of 109 neurons running in dasiareal timepsila, by which we mean that a similarly sized collection of biological neurons would run at the same speed. In this paper we describe the methods by which neural networks are mapped onto the system, and how features designed into the chip are to be exploited in practice. We will also describe the modelling and verification activities by which we hope to ensure that, when the chip is delivered, it will work as anticipated.
Keywords :
microprocessor chips; multiprocessor interconnection networks; neural nets; ARM processor; SpiNNaker chips; biological neurons; large scale spiking neural networks simulations; massively-parallel chip multiprocessor; Biological neural networks; Communication system control; Computational modeling; Computer architecture; Concurrent computing; Large-scale systems; Network-on-a-chip; Neural networks; Neurons; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2008. IJCNN 2008. (IEEE World Congress on Computational Intelligence). IEEE International Joint Conference on
Conference_Location :
Hong Kong
ISSN :
1098-7576
Print_ISBN :
978-1-4244-1820-6
Electronic_ISBN :
1098-7576
Type :
conf
DOI :
10.1109/IJCNN.2008.4634199
Filename :
4634199
Link To Document :
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