DocumentCode
296159
Title
Digital design of discrete exponential bidirectional associative memory
Author
Wang, Chua-Chin ; Fan, Chih-Lwan
Author_Institution
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume
4
fYear
1995
fDate
Nov/Dec 1995
Firstpage
2031
Abstract
The exponential bidirectional associative memory (eBAM) was proved to be a systematically stable high-capacity memory. Considering the implementation of such an eBAM, we adopt the digital logic methodology which is based on several factors, such as scalability and speed. In order to realize the eBAM by digital circuitry only, some special design is required such that the exponential function can be implemented without the loss of operating speed. For example, the exponent 8-to-9 high-speed value generator. Besides, the traditional addaccumulator costs too much area when the dimension of patterns is large. A pipelined incrementdecrement accumulator is proposed in the design, which can also speed up the addition or subtraction besides the saving of chip area
Keywords
associative processing; content-addressable storage; integrated memory circuits; logic design; neural chips; random-access storage; summing circuits; addition; bidirectional associative memory; digital logic; discrete exponential BAM; exponential function; neural chips; pipelined increment/decrement accumulator; scalability; subtraction; Associative memory; Autocorrelation; Circuits; Costs; Logic design; Magnesium compounds; Neural network hardware; Neural networks; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1995. Proceedings., IEEE International Conference on
Conference_Location
Perth, WA
Print_ISBN
0-7803-2768-3
Type
conf
DOI
10.1109/ICNN.1995.488986
Filename
488986
Link To Document