Title :
New subranging adc architecture for telecommunication systems
Author_Institution :
Univ. of Roma, Roma
fDate :
Sept. 30 2007-Oct. 4 2007
Abstract :
A new architecture of subranging ADC is proposed. Against a little increase of the number of comparators than a classical subranging architecture, the substitution of the DAC and summing node brings to a reduction of total conversion time, approaching it to an ADC flash behavior.
Keywords :
analogue-digital conversion; telecommunication networks; analogue to digital converters; subranging ADC architecture; summing node; telecommunication systems; total conversion time reduction; Analog-digital conversion; Application software; Batteries; Capacitance; Computer architecture; Energy consumption; Internet; Resistors; Sampling methods; Signal resolution;
Conference_Titel :
Telecommunications Energy Conference, 2007. INTELEC 2007. 29th International
Conference_Location :
Rome
Print_ISBN :
978-1-4244-1627-1
Electronic_ISBN :
978-1-4244-1628-8
DOI :
10.1109/INTLEC.2007.4448894
