A self-reference read scheme for a 1T/1C FeRAM

This paper describes a self-reference read scheme for use with 1T/1C FeRAMs. It is able to overcome the reference voltage problem faced by conventional 1T/1C FeRAMs without the use of any reference cells. The proposed scheme employs a memory cell that is accessed twice, and it uses this cell to generate a reference voltage. This self-generated reference voltage is automatically kept between read bit line voltages, which correspond to stored data ("1" and "0"). We have designed and fabricated a test device, and confirmed the viability of the read scheme.