Title :
Estimation of ground bounce effects on CMOS circuits
Author :
Kabbani, A. ; Al-Khalili, A.J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
As chip density is increased, number of I/Os are increased, and clock driver and fan out drivers constitute a large part of the chip. However, simultaneous switching of these drivers produces undesired noise and voltage changes on the chip ground and Vdd rails. In this paper these noises are modeled and simple expressions are derived that can estimate the shape and the peak of these pulses. These models are derived for both the long channel and short channel CMOS devices. HSPICE simulations confirm the validity of these models
Keywords :
CMOS digital integrated circuits; equivalent circuits; integrated circuit modelling; integrated circuit noise; CMOS circuits; ground bounce effects estimation; long channel CMOS devices; noise modelling; short channel CMOS devices; simultaneous switching; Clocks; Driver circuits; Inductance; Noise shaping; Packaging; Power supplies; Rails; Semiconductor device modeling; Switches; Voltage;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.777946
