Use of a calibrated voltage reference to enhance the performance of switched capacitor sigma-delta ADCs over process corner

To enhance the performance of a switched-capacitor sigma-delta ADC we present a digitally trimmable on-chip voltage reference with a minimum step size in the range of 1-2mV@1.5-2.5V. Due to a multi-stage calibration scheme the output voltage of the reference could be additionally adjusted over a wide range of 500-700mV@1.7-2.1V. This can be useful to later adjust the reference levels in the sigma-delta modulator after design time (post-production).