DocumentCode :
2962559
Title :
Use of a calibrated voltage reference to enhance the performance of switched capacitor sigma-delta ADCs over process corner
Author :
Spilka, Ronald ; Gruber, Dominik ; Ostermann, Timm
Author_Institution :
Inst. for Integrated Circuits, Johannes Kepler Univ. of Linz, Linz, Austria
fYear :
2011
fDate :
14-15 Nov. 2011
Firstpage :
1
Lastpage :
6
Abstract :
To enhance the performance of a switched-capacitor sigma-delta ADC we present a digitally trimmable on-chip voltage reference with a minimum step size in the range of 1-2mV@1.5-2.5V. Due to a multi-stage calibration scheme the output voltage of the reference could be additionally adjusted over a wide range of 500-700mV@1.7-2.1V. This can be useful to later adjust the reference levels in the sigma-delta modulator after design time (post-production).
Keywords :
calibration; sigma-delta modulation; switched capacitor networks; digitally trimmable on-chip voltage reference; multistage calibration scheme; sigma-delta modulator; switched capacitor sigma-delta ADC; voltage 1 mV to 2 mV; voltage 1.5 V to 2.5 V; voltage reference calibration; Calibration; Fuses; Lasers; MOSFET circuits; Metals; Modulation; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NORCHIP, 2011
Conference_Location :
Lund
Print_ISBN :
978-1-4577-0514-4
Electronic_ISBN :
978-1-4577-0515-1
Type :
conf
DOI :
10.1109/NORCHP.2011.6126717
Filename :
6126717
Link To Document :
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