Investigation of aging effects in different implementations and structures of programmable routing resources of FPGAs

Author

Amouri, Abdulazim ; Kiamehr, Saman ; Tahoori, Mehdi

Author_Institution

Dept. of Dependable Nano-Comput., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany

fYear

2012

fDate

10-12 Dec. 2012

Firstpage

215

Lastpage

219

Abstract

Transistor aging mostly due to Negative and Positive Bias Temperature Instability (NBTI and PBTI) is a major reliability threat for VLSI circuits fabricated in nanometer technology nodes. As much as FPGAs benefit from the most scaled and advanced technologies, they become more susceptible to transistor aging. In this paper, we investigate the effect of transistor aging on programmable routing resources of FPGAs, by considering different implementations through detailed SPICE simulations. The effects of different parameters, such as wire length, cascaded routing, routing fan-out, signal probability and supply voltage on the aging of routing resources are studied.

Keywords

SPICE; VLSI; field programmable gate arrays; negative bias temperature instability; transistors; FPGA; SPICE simulation; VLSI circuit; cascaded routing; nanometer technology nodes; negative bias temperature instability; positive bias temperature instability; programmable routing resources; routing fan out; signal probability; supply voltage; transistor aging effect; Aging; Delay; Field programmable gate arrays; Logic gates; Routing; Transistors; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Technology (FPT), 2012 International Conference on

Conference_Location

Seoul

Print_ISBN

978-1-4673-2846-3

Electronic_ISBN

978-1-4673-2844-9

Type

conf

DOI

10.1109/FPT.2012.6412136

Filename

6412136