An Automated SEU Fault-Injection Method and Tool for HDL-Based Designs

Author

Mansour, Wassim ; Velazco, Raoul

Author_Institution

TIMA Lab., Inst. Nat. Polytech. de Grenoble (INP), Grenoble, France

Volume

60

Issue

4

fYear

2013

fDate

Aug. 2013

Firstpage

2728

Lastpage

2733

Abstract

Evaluating the sensitivity to soft-errors of integrated circuits and systems became a main issue especially if they are intended to operate in space or at high altitudes. In this paper, a new fully automated SEU fault-injection method is presented and illustrated by its application to an 8051 microcontroller. Predicted SEU error-rates are in a good agreement with results issued from radiation ground testing, thus putting in evidence the accuracy of the studied method.

Keywords

fault diagnosis; hardware description languages; integrated circuit design; integrated circuit testing; microcontrollers; radiation hardening (electronics); 8051 microcontroller; HDL-based design; SEU error-rate prediction; automated SEU fault-injection method; integrated circuit; radiation ground testing; soft-error sensitivity; Circuit faults; Field programmable gate arrays; Hardware; Hardware design languages; Integrated circuit modeling; Program processors; Testing; Fault injection; SRAM-based FPGA; hardware description language; single event upsets;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2013.2267097

Filename

6555963