Title :
Wave Pipelining using Self Reset Logic
Author :
Litvin, Miguel E. ; Mourad, Samiha ; Terry, W. ; Terry, Janice
Author_Institution :
Santa Clara Univ., Santa Clara
Abstract :
A novel design approach combining Wave Pipelining and Self Reset Logic provides an elegant solution at high speed data throughput with significant savings in power and area as compared with other dynamic CMOS Logic implementations.
Keywords :
logic circuits; pipeline arithmetic; complementary metal-oxide-semiconductor; dynamic CMOS logic; self reset logic; wave pipelining; CMOS logic circuits; Clocks; Delay effects; Logic design; Pipeline processing; Rails; Registers; Space vector pulse width modulation; Throughput; Timing;
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
DOI :
10.1109/ICECS.2006.379715
