• DocumentCode
    2962948
  • Title

    Wave Pipelining using Self Reset Logic

  • Author

    Litvin, Miguel E. ; Mourad, Samiha ; Terry, W. ; Terry, Janice

  • Author_Institution
    Santa Clara Univ., Santa Clara
  • fYear
    2006
  • fDate
    10-13 Dec. 2006
  • Firstpage
    1280
  • Lastpage
    1283
  • Abstract
    A novel design approach combining Wave Pipelining and Self Reset Logic provides an elegant solution at high speed data throughput with significant savings in power and area as compared with other dynamic CMOS Logic implementations.
  • Keywords
    logic circuits; pipeline arithmetic; complementary metal-oxide-semiconductor; dynamic CMOS logic; self reset logic; wave pipelining; CMOS logic circuits; Clocks; Delay effects; Logic design; Pipeline processing; Rails; Registers; Space vector pulse width modulation; Throughput; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
  • Conference_Location
    Nice
  • Print_ISBN
    1-4244-0395-2
  • Electronic_ISBN
    1-4244-0395-2
  • Type

    conf

  • DOI
    10.1109/ICECS.2006.379715
  • Filename
    4263608
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2962948