• DocumentCode
    2963057
  • Title

    A 0.13µm CMOS ΔΣ PLL FM transmitter

  • Author

    Wu, Ying ; Liu, Xiaodong ; Ye, Dawei ; Viswam, Vijay ; Zhu, Lin ; Lu, Ping ; Radjen, Dejan ; Sjoland, Henrik

  • Author_Institution
    Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden
  • fYear
    2011
  • fDate
    14-15 Nov. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A short range FM transmitter is presented. It uses an architecture where the output frequency of a phase locked loop (PLL) is modulated by varying the division number of the feedback divider, using the 1-bit output of a ΔΣ ADC. The measured total harmonic distortion (THD) plus noise is less than 1% at 75 kHz deviation. The transmitter is fully integrated in a 0.13μm CMOS process and the core area is 0.24 mm2. The current consumption is 4.4mA from a 1.2V supply.
  • Keywords
    delta-sigma modulation; phase locked loops; radio transmitters; CMOS delta sigma PLL FM transmitter; CMOS process; current 4.4 mA; feedback divider; frequency 7 kHz; phase locked loop; short range FM transmitter; size 0.13 mum; total harmonic distortion; voltage 1.2 V; CMOS integrated circuits; Switches; Timing; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    NORCHIP, 2011
  • Conference_Location
    Lund
  • Print_ISBN
    978-1-4577-0514-4
  • Electronic_ISBN
    978-1-4577-0515-1
  • Type

    conf

  • DOI
    10.1109/NORCHP.2011.6126744
  • Filename
    6126744
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2963057