DocumentCode
2963113
Title
A fault-tolerant reconfiguration scheme in the faulty star graph
Author
Chen, Yuh-shyan ; Sheu, Jang-Ping
Author_Institution
Dept. of Comput. Sci, Chung-Hua Polytech. Inst., Hsin-Chu, Taiwan
fYear
1996
fDate
11-13 Jun 1996
Firstpage
241
Lastpage
248
Abstract
We propose a scheme to identify the maximal fault-free substar-ring. This is the first result to derive a reconfiguration scheme with high processor utilization in the faulty n-star graph. The maximal fault-free substar-ring is connected by a ring of fault-free virtual substars with dilation 3 and maximal length of the ring is n(n-l)(n-2). Our proposed scheme can tolerate n-3 faults such that the processor utilisation is (n2-2n+3)/(n2-n). This is a near optimal result since the maximal fault-free substar-ring is constructed by using all of the possible fault-free (n-2)-substars. Moreover, our algorithm can still work when number of faults exceeds n-3. The simulation results also show that the processor utilization is more than 50% if the number of faults is less than (n2-n-1)/(2) in the n-star graph
Keywords
fault tolerant computing; multiprocessor interconnection networks; parallel architectures; reconfigurable architectures; fault-tolerant; faulty star graph; high processor utilization; maximal fault-free substar-ring; near optimal result; reconfiguration scheme; Algorithm design and analysis; Computer science; Costs; Fault diagnosis; Fault tolerance; Fault tolerant systems; Hypercubes; Multiprocessor interconnection networks; Partitioning algorithms; Sorting;
fLanguage
English
Publisher
ieee
Conference_Titel
Algorithms & Architectures for Parallel Processing, 1996. ICAPP 96. 1996 IEEE Second International Conference on
Print_ISBN
0-7803-3529-5
Type
conf
DOI
10.1109/ICAPP.1996.562881
Filename
562881
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