Title :
ASAP applications of simulation modeling in a wafer fab
Author :
Potti, Kishore ; Gupta, Amit
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
The authors define 4 levels of complexity in simulation modeling: the ability of the models to predict bottlenecks in the fab, capability of the model to be used for strategic applications such as cycle time reduction, the simulation of complex dispatch rules using the model, and the capability of the model to predict operational output of the wafer fab that is clean room outputs by product by day. This paper presents the operational applications of the ASAP simulation model to provide WIP flush to the test probe area and the flush provided to planning for financial estimates and fab commitments. WIP flush is defined as a prediction of the fab output by device/technology by day. In general the ability to predict the shorter time horizon the more difficult it is to predict the output accurately. Excursions are defined as any deviations in the normal processing of wafers such as unusually high particles being shown on statistical process control charts etc.
Keywords :
clean rooms; digital simulation; integrated circuit manufacture; manufacturing data processing; production control; ASAP applications; bottlenecks; complex dispatch rules; cycle time reduction; financial estimates; simulation modeling; statistical process control charts; wafer fabrication; Control systems; Instruments; Job shop scheduling; Predictive models; Qualifications; Routing; Semiconductor device modeling; Statistics; Testing; Throughput;
Conference_Titel :
Simulation Conference, 2002. Proceedings of the Winter
Print_ISBN :
0-7803-7614-5
DOI :
10.1109/WSC.2002.1166477