DocumentCode :
2963202
Title :
A High-speed Comparator for a 12-bit 100MS/s Pipelined ADC
Author :
Zhang, Li
Author_Institution :
Communicate Eng. Dept., Xi´´an Univ. of Sci. & Technol., Xian, China
Volume :
2
fYear :
2011
fDate :
28-29 March 2011
Firstpage :
341
Lastpage :
343
Abstract :
A new kind of differential comparator is presented. A differential difference amplifier circuit is used to compare analog input signal and reference voltage. The experimental results show that the comparator improves speed and power performances compared with traditional comparators. The comparator is implemented in SMIC0.18 CMOS process, consumes 0.9 mW, and has a layout size of 508 μm2.
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); differential amplifiers; reference circuits; SMIC0.18 CMOS process; analog input signal; differential difference amplifier circuit; high-speed comparator; pipelined ADC; power 0.9 mW; reference voltage; Capacitors; Clocks; Indium phosphide; Latches; Power dissipation; Preamplifiers; Solid state circuits; Comparator; High-speed; Lowpower dissipation; Pipelined ADC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Computation Technology and Automation (ICICTA), 2011 International Conference on
Conference_Location :
Shenzhen, Guangdong
Print_ISBN :
978-1-61284-289-9
Type :
conf
DOI :
10.1109/ICICTA.2011.369
Filename :
5750894
Link To Document :
بازگشت