An orthogonal multiprocessor for ATM switch system

Author

Lee, Liang-Teh ; Huang, Po-Hsian ; Hwang, Kuen-Huann

Author_Institution

Dept. of Comput. Sci. & Eng., Tatung Inst. of Technol., Taipei, Taiwan

fYear

1996

fDate

11-13 Jun 1996

Firstpage

249

Lastpage

255

Abstract

Asynchronous Transfer Mode (ATM) presents an evolutionary path to provide high bandwidth services and integrates many existing networks into a common architecture. However, ATM should provide native packet services, yet the cell relay method of ATM cannot efficiently fit packet service, especially in heavy traffic. In this paper, we employ an OrthogonaI Multiprocessor (OMP) architecture using Dual-Port memory to enhance the CPU power and eliminate the bus contention problem. The proposed architecture called EOMPA (Enhanced OMP Architecture) also applies a multi-level switch method to fit the multifarious traffics

Keywords

asynchronous transfer mode; multiprocessing systems; parallel architectures; ATM switch system; Dual-Port memory; EOMPA; Enhanced OMP Architecture; bus contention; cell relay; multi-level switch; orthogonal multiprocessor; Asynchronous transfer mode; Bandwidth; Computer architecture; Computer science; Fabrics; Interleaved codes; Packet switching; Relays; Switches; Telecommunication traffic;

fLanguage

English

Publisher

ieee

Conference_Titel

Algorithms & Architectures for Parallel Processing, 1996. ICAPP 96. 1996 IEEE Second International Conference on

Print_ISBN

0-7803-3529-5

Type

conf

DOI

10.1109/ICAPP.1996.562882

Filename

562882