Title :
Optimized automatic target recognition algorithm on scalable Myrinet/field programmable array nodes
Author_Institution :
Lab. of Embedded Signal Processing, Texas Univ., Austin, TX, USA
fDate :
Oct. 29 2000-Nov. 1 2000
Abstract :
Automatic target recognition (ATR) in synthetic aperture radar (SAR) imagery often requires billions of operations per second. This paper describes a compact scalable system developed at Myricom for high-performance implementation of the template-based SAR ATR algorithms developed by Sandia National Laboratories. The Myricom system is mapped on the multiple concurrent field programmable array (FPGA) computing nodes connected by Myrinet. These FPGA nodes achieve high efficiency, through the exploitation of the unique characteristics of the ATR algorithm in FPGA. The contributions of this paper are the descriptions of the architectural designs for the ATR system on the scalable FPGA nodes.
Keywords :
digital signal processing chips; field programmable gate arrays; image recognition; pipeline processing; radar imaging; radar target recognition; synthetic aperture radar; systolic arrays; ATR; FPGA computing node; Myricom; Myrinet; SAR imagery; architectural designs; compact scalable system; multiple concurrent field programmable array computing nodes; optimized automatic target recognition algorithm; synthetic aperture radar imagery; template-based SAR ATR algorithms; Algorithm design and analysis; Computer networks; Concurrent computing; Field programmable gate arrays; Hardware; Image processing; Laboratories; Real time systems; Superluminescent diodes; Target recognition;
Conference_Titel :
Signals, Systems and Computers, 2000. Conference Record of the Thirty-Fourth Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-7803-6514-3
DOI :
10.1109/ACSSC.2000.911249