Co-Simulation of Pipeline ADC Using Simulink and PSpice

In order to ensure the correctness and performance of modern ADC design, the system level simulation using Simulink and transistor level simulation using PSpice are often implemented. System level simulation can be finished in a short time, but it can only verify the function of design and can´t check the performance and non-idealities of the real ADC circuits. Transistor level simulation can solve such problems but it usually needs a much longer simulation run time. To diminish the time to market (TTM), it is necessary to find a new simulation technique that can make both the precision and the run time meet engineering requirement. In this paper, a pipeline ADC is used as an example to introduce a co-simulation technique that can make use of the merits and overcome the drawbacks of the Simulink and PSpice tools. The whole ADC is simulated in the environment of MATLAB/Simulink while using SLPS module to call PSpice to simulate analog parts of the ADC on transistor level. With this technique, the simulation run time can be diminished greatly while the simulation precision can be well ensured and a satisfactory simulation result is generated.