A Simulation Framework to Introduce Modern DSP Based Synchronization Techniques in a PLL Course

In a traditional course on phase-locked loops (PLLs) with applications, analog PLLs are the major focus. Indeed, there are many PLL fundamental topics that need to be understood before moving on to applications. It is within the context of this course that the need to expose the students to pure digital signal processing (DSP) based synchronization arises. To introduce synchronization using a pure DSP implementation, a MATLAB simulation framework was created. This paper describes the framework which includes transmitter, channel, and receiver m-code modules. Carrier phase tracking and symbol synchronization schemes are built into the framework, along with a means to stress these subsystems with carrier frequency and phase offsets, and sampling clock error relative to the symbol rate