CMOS imager technology shrinks and image performance

Author

Rhodes, H. ; Agranov, G. ; Hong, C. ; Boettiger, U. ; Mauritzson, R. ; Ladd, J. ; Karasev, I. ; McKee, J. ; Jenkins, E. ; Quinlin, W. ; Patrick, I. ; Li, J. ; Fan, X. ; Panicacci, R. ; Smith, S. ; Mouli, C. ; Bruce, J.

Author_Institution

Micron Technol. Inc., Boise, ID, USA

fYear

2004

fDate

2004

Firstpage

7

Lastpage

18

Abstract

In this paper, we present a performance summary of CMOS imager pixels from 5.2 μm to 4.2 μm using 0.18 μm imager design rules, then to 3.2 μm using 0.15 μm imager design rules. These pixels support 1.3-megapixel, 2.0-megapixel, and 3.1-megapixel CMOS image sensors for digital still cameral (DSC) applications at 3.3 V, respectively. The 4TC pixels are all based on technology shrinks of Micron´s 2P3M imager process, and each of the technology nodes report excellent CMOS imager low-noise, high-sensitivity, low-lag, and low-light performance, matching that of state-of-the-art charged-coupled device (CCD) imagers. We have put a model in place to provide the predictive performance of smaller pixels, and then use that model to discuss performance expectations down to 2.0 μm pixels. With the combination of imager design rules, pixel architecture, and process technology tailored for CMOS imagers, we see no fundamental reason that CMOS imagers should not be able to continue matching CCD performance as pixel sizes shrink.

Keywords

CMOS image sensors; integrated circuit design; integrated circuit modelling; 0.15 micron; 0.18 micron; 1300000 pixel; 2.0 micron; 2000000 pixel; 3.2 micron; 3.3 V; 3100000 pixel; 4.2 micron; 5.2 micron; CMOS imager technology; DSC; digital still cameral applications; image sensors; imager design rules; imager pixel size shrinking; low-lag performance; low-light performance; low-noise performance; pixel architecture; CMOS image sensors; CMOS process; CMOS technology; Charge coupled devices; Design optimization; Pixel; Predictive models; Random access memory; Semiconductor device modeling; Semiconductor device noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics and Electron Devices, 2004 IEEE Workshop on

Print_ISBN

0-7803-8369-9

Type

conf

DOI

10.1109/WMED.2004.1297338

Filename

1297338