• DocumentCode
    2964614
  • Title

    A novel dual-modulation design low input impedance current comparator

  • Author

    Paglinawan, Arnold C. ; Paglinawan, Charmaine C. ; Shao-Chun Cheng ; Wen-Yaw Chung

  • Author_Institution
    Sch. of EECE, Mapua Inst. of Technol., Manila, Philippines
  • fYear
    2012
  • fDate
    19-22 Nov. 2012
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    This paper presents a new current comparator with a novel dual-modulation concept. The dual modulation concept has the ability to increase the accuracy quite substantially. The output voltage range still reaches its maximum peak value of 1.2V when the differential current is only 0.6 nA with a 3.3 V supply voltage. In addition to high-accuracy, the design reduced the input impedance of the proposed current comparator to 1/(gm2ro) even without the use of an operational amplifier (OPA). Moreover, the novel current comparator was implemented using TSMC 0.35 μm Mixed-Signal 2P4M Polycide 3.3V models with an active area of 0.0024 mm2.
  • Keywords
    analogue-digital conversion; current comparators; current-mode circuits; modulation; TSMC mixed-signal 2P4M polycide model; current 0.6 nA; current-mode ADC; dual-modulation design; impedance current comparator; size 0.35 mum; voltage 1.2 V; voltage 3.3 V; Accuracy; CMOS integrated circuits; Impedance; Modulation; Photonic band gap; Sensors; Sugar; comparator; current-mode ADC; dual modulation; flipped voltage follower;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON 2012 - 2012 IEEE Region 10 Conference
  • Conference_Location
    Cebu
  • ISSN
    2159-3442
  • Print_ISBN
    978-1-4673-4823-2
  • Electronic_ISBN
    2159-3442
  • Type

    conf

  • DOI
    10.1109/TENCON.2012.6412233
  • Filename
    6412233