DocumentCode
2964727
Title
Adjusting poly texture to reduce TiSi2 agglomeration [semiconductor manufacturing]
Author
Zhang, Jingyan ; Pan, Qi
Author_Institution
Micron Technol. Inc., Boise, ID, USA
fYear
2004
fDate
2004
Firstpage
93
Lastpage
94
Abstract
With its low resistivity and relatively high thermal stability, TiSi2 is a promising gate material for use in semiconductor manufacturing. It can survive the oxidization and backend thermal steps without a spacer; however, it sometimes agglomerates into the gate poly. This paper outlines a possible solution that entails replacing the normal amorphous gate poly with a different type of as-deposited poly to reduce the gate short caused by agglomeration. Scanning electron microscopy (SEM) inspections of cross sections of blank test wafers reveal the potential of this method.
Keywords
elemental semiconductors; scanning electron microscopy; semiconductor technology; silicon; silicon compounds; SEM inspection; TiSi2-Si; agglomeration induced gate short; agglomeration reduction; backend thermal steps; gate polysilicon layer; high thermal stability material; low resistivity material; oxidization; poly texture adjustment; scanning electron microscopy; semiconductor manufacturing gate material; Amorphous silicon; Conductivity; Grain size; Rapid thermal annealing; Scanning electron microscopy; Semiconductor films; Temperature; Testing; Thermal resistance; Thermal stability;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics and Electron Devices, 2004 IEEE Workshop on
Print_ISBN
0-7803-8369-9
Type
conf
DOI
10.1109/WMED.2004.1297361
Filename
1297361
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