Virtual VLSI Laboratory for Computer Science Students: Erudite and Illusive

The paper reports a novel approach of self teaching Very Large Scale Integration (VLSI) to Computer Science students through the use of a Virtual laboratory. It formalizes the notion of hierarchical design of Integrated Circuits and abstracts the notion of design of integrated circuits based on physical approaches. Using the developed Virtual VLSI Laboratory, a set of about 100 Computer Science students have been trained and the feedback from them indicates that more than 80% of these students could understand the experiments being taught through the Virtual Laboratory and 70% of the students were interested in the field of VLSI Design after doing experiments in the lab.