DocumentCode
2965164
Title
A mismatch insensitive CMOS dynamic comparator for pipeline A/D converters
Author
Sumanen, L. ; Waltari, M. ; Halonen, Kari
Author_Institution
Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo
Volume
1
fYear
2000
fDate
2000
Firstpage
32
Abstract
A new fully differential CMOS dynamic comparator topology suitable for pipeline A/D converters with a low stage resolution is proposed. A thorough analysis of its function and a comparison to a widely used dynamic comparator are given in this paper. The proposed topology, based on two cross coupled differential pairs and switchable current sources, has a small power and area dissipation and it is shown to be very robust against transistor mismatch
Keywords
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); pipeline processing; CMOS dynamic comparator; cross coupled differential pairs; fully differential comparator topology; low stage resolution; mismatch insensitive comparator; pipeline A/D converters; pipeline ADCs; switchable current sources; transistor mismatch robustness; CMOS technology; Circuit noise; Electronic circuits; Energy consumption; Latches; Pipelines; Power dissipation; Robustness; Topology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location
Jounieh
Print_ISBN
0-7803-6542-9
Type
conf
DOI
10.1109/ICECS.2000.911478
Filename
911478
Link To Document