A novel architecture for Walsh Hadamard transforms using distributed arithmetic principles

The Walsh-Hadamard transforms are important in many image processing applications including compression, filtering and code design. A novel architecture for the Fast Hadamard Transform, using distributed arithmetic techniques, is proposed. In the paper, the mathematical model for the algorithm proposed, the associated design using both a distributed arithmetic ROM and Accumulator structure and a sparse matrix factorisation technique are described. The design has O(2W) computation time complexity, where W is the input wordlength, requires less area when compared with existing systolic architectures and is suitable for FPGA implementations