DocumentCode
2966891
Title
Subthreshold slope reduction of tunneling transistors through deformation potential engineering
Author
Agarwal, Sapan ; Mazzeo, Giovanni ; Yablonovitch, Eli
Author_Institution
Electr. Eng.& Comput. Sci. Dept., Univ. of California, Berkeley, CA
fYear
2008
fDate
2-15 Aug. 2008
Firstpage
315
Lastpage
316
Abstract
The subthreshold slope of a tunneling transistor can be reduced by reducing the effects of thermal vibrations on the band edge energy through a biaxial tensile strain and using a silicon germanium superlattice.
Keywords
Ge-Si alloys; internal stresses; semiconductor materials; semiconductor superlattices; tunnel transistors; vibrations; SiGe; band edge energy; biaxial tensile strain; deformation potential engineering; silicon germanium superlattice; subthreshold slope reduction; thermal vibrations; tunneling transistors; Capacitive sensors; Equations; Germanium; MOSFETs; Photonic band gap; Power engineering and energy; Silicon; Tensile strain; Tunneling; Uniaxial strain;
fLanguage
English
Publisher
ieee
Conference_Titel
Nano-Optoelectronics Workshop, 2008. i-NOW 2008. International
Conference_Location
Shonan Village
Print_ISBN
978-1-4244-2656-0
Type
conf
DOI
10.1109/INOW.2008.4634560
Filename
4634560
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