Title :
CMOS LNA in wireless applications
Author :
Yang, Shijun ; Mason, Ralph ; Plett, Calvin
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Abstract :
A 1.9 GHz low noise amplifier has been designed in a standard CMOS .35 micron process. The amplifier provides a gain of 21 dB with a noise figure only 1.4 dB while drawing 6.5 mW from a 1.5 V supply. The design process and simulation results are presented. The LNA design with variable bias is suitable for the proposed smart receiver
Keywords :
CMOS integrated circuits; UHF amplifiers; cellular radio; radio receivers; 0.35 micron; 1.4 dB; 1.5 V; 1.9 GHz; 21 dB; 6.5 mW; CMOS LNA; GSM radio air interface specification; LNA design; UHF; gain; low noise amplifier; noise figure; simulation results; smart receiver; standard CMOS process; supply voltage; variable bias; wireless applications; CMOS process; CMOS technology; Circuit simulation; Energy consumption; Impedance matching; Inductors; Linearity; Low-noise amplifiers; Noise figure; Passive filters;
Conference_Titel :
Vehicular Technology Conference, 1999 IEEE 49th
Conference_Location :
Houston, TX
Print_ISBN :
0-7803-5565-2
DOI :
10.1109/VETEC.1999.778372
