DocumentCode
2969824
Title
Automatic analysis of memory faulty behavior in defective memories
Author
AL-Ars, Zaid ; Hamdioui, Said
Author_Institution
Delft Univ. of Technol., Delft
fYear
2007
fDate
2-5 Sept. 2007
Firstpage
41
Lastpage
46
Abstract
As the complexity of memory faulty behavior increases, it is becoming more difficult to precisely identify the faults the memory exhibits. Knowledge of the precise set of faults is essential for designing an optimal set of memory tests with low test time and high fault coverage. This paper presents an automatic method to analyze the observed faulty behavior and to map it precisely into corresponding faults. The method is unique in its generality, making it possible to identify both static as well as dynamic faults in the behavior. Depending on the complexity of the performed fault analysis, different algorithms may be used, with increasing level of computational complexity.
Keywords
automatic testing; fault simulation; integrated memory circuits; automatic analysis; automatic method; defective memory; fault identification; functional fault models; memory faulty behavior; memory tests; precise faults; systematic fault analysis; test optimization; Algorithm design and analysis; Automatic testing; Computational complexity; Costs; Fault diagnosis; Information analysis; Laboratories; Mathematics; Performance analysis; System testing; fault identification; functional fault models; precise faults; systematic fault analysis; test optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on
Conference_Location
Rabat
Print_ISBN
978-1-4244-1277-8
Electronic_ISBN
978-1-4244-1278-5
Type
conf
DOI
10.1109/DTIS.2007.4449489
Filename
4449489
Link To Document