Front-end IP development: Basic know-how

Author

Oudjida, A.K. ; Benamrouche, D. ; Lien, Matthew

Author_Institution

Centre de Dev. des Technol. Avancees, Algiers

fYear

2007

fDate

2-5 Sept. 2007

Firstpage

60

Lastpage

63

Abstract

IP reuse is a part of the solution to the well known design-gap problem. It aims at closing the gap between what semiconductor-technology is offering in terms of integration capacity, and what is practically possible to implement in silicon with current design methodologies and tools. This paper summarizes in bullet-point-style the most important issues related to front-end IP-development and introduces a detailed technical documentation template for small to medium size IPs as well as a number of recommendations for hardware/software verification of the IP. The purpose of this paper is to provide students and engineers with basic know-how to develop high-quality and qualified IPs for modern SoC applications. This includes all necessary steps from requirements specification till the validation of the IP core. A special emphasis is devoted to documentation and verification as they are the most time-consuming phases in IP-projects.

Keywords

integrated circuit design; logic design; semiconductor technology; silicon; system-on-chip; IP core; design-gap problem; documentation process; front-end IP-development; functional verification process; hardware-software verification; modern SoC applications; semiconductor-technology; silicon implementation; technical documentation template; Application software; Circuit testing; Design methodology; Documentation; Hardware; Laboratories; Microelectronics; Process design; Productivity; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on

Conference_Location

Rabat

Print_ISBN

978-1-4244-1277-8

Electronic_ISBN

978-1-4244-1278-5

Type

conf

DOI

10.1109/DTIS.2007.4449493

Filename

4449493