Title :
A digitally controlled 5GHz analog phase interpolator with 10GHz LC PLL
Author :
Benyahia, Mohamed ; Moulard, Jean Batiste ; Badets, Franck ; Mestassi, Anouar ; Finateu, Thomas ; Vogt, Lionel ; Boissieres, Fabrice
Author_Institution :
STMictroelectronics, Rabat
Abstract :
This paper describes a 5 GHz Analog Phase Interpolator (API) for clock synthesis and clock data recovery dedicated to multi-gigabit/s serial link applications. The system includes a 10 GHz LC Phase Locked Loop for clock generation and an Analog Phase Interpolator implemented with Current Mode Logic (CML) offering better phase noise and speed performances compared to CMOS logic. It has been implemented in ST´s 65 nm RfCMOS technology. The core of the API occupies a silicon area of 0.09 x 0.17 mm2 and dissipates less than 22.56 mW from a 1.2 V voltage supply.
Keywords :
CMOS logic circuits; clocks; phase locked loops; CMOS logic; LC PLL; RfCMOS technology; analog phase interpolator; clock data recovery; clock generation; clock synthesis; current mode logic; frequency 10 GHz; frequency 5 GHz; phase locked loop; phase noise; size 65 nm; voltage 1.2 V; Bandwidth; CMOS logic circuits; Clocks; Digital control; Frequency modulation; Frequency synthesizers; Interpolation; Jitter; Phase locked loops; Spread spectrum communication; Analog phase interpolator; CML; PLL LC; SERDES;
Conference_Titel :
Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on
Conference_Location :
Rabat
Print_ISBN :
978-1-4244-1277-8
Electronic_ISBN :
978-1-4244-1278-5
DOI :
10.1109/DTIS.2007.4449506
