DocumentCode
2970616
Title
An advanced step for the conventional CMOS ASIC package
Author
Otsuka, Kanji ; Shirai, Yuji ; Okinaga, Takayuki ; Utsumi, Yasuyuki ; Koide, Kazuo
Author_Institution
Hitachi Ltd., Tokyo, Japan
fYear
1989
fDate
22-24 May 1989
Firstpage
875
Lastpage
880
Abstract
A ceramic pin grid array (PGA) with improved 40-μm-line thin-film aluminum metallization is described. Fine pitch bonding on 120-μm centers has been successfully implemented. The 400-pin array package is no larger than the previous 240-pin packages. Worst-case capacitances of 1.94 pF, and inductances of 8.5 nH, have been achieved with further reductions possible. The thermal resistance of the package is 6.5°C/W using an aluminum cap with aluminum fins and solder glass sealing
Keywords
CMOS integrated circuits; aluminium; application specific integrated circuits; integrated circuit technology; metallisation; packaging; 1.94 pF; 40 micron; 400-pin array package; Al cap; Al fins; CMOS ASIC package; ceramic PGA; fine pitch bonding; monolithic IC; pin grid array; solder glass sealing; thermal resistance; thin film Al metallisation; Aluminum; Application specific integrated circuits; Bonding; Capacitance; Ceramics; Electronics packaging; Glass; Metallization; Thermal resistance; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components Conference, 1989. Proceedings., 39th
Conference_Location
Houston, TX
Type
conf
DOI
10.1109/ECC.1989.77848
Filename
77848
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