FACSE: A framework for architecture and compilation space exploration

Author

Niar, Smail ; Inglart, Nicolas ; Chaker, Mahdi ; Hanafi, Said ; Benameur, Nasser

Author_Institution

Univ. of Valenciennes, Valenciennes

fYear

2007

fDate

2-5 Sept. 2007

Firstpage

249

Lastpage

252

Abstract

To exploit microelectronics progresses for next processor generations, it is crucial to design new tools allowing a better adequacy between architectures and applications. The Facse project, which we present in this paper, strives to achieve this objective. As the two aspects of the system (hardware and software) are taken into account simultaneously, it is possible to increase the performances significantly. Facse is based on the use of adapted heuristics to guide search towards the most promising architecture and compiler optimization configurations in one side and rapid evaluation methods of these configurations on the other side.

Keywords

hardware-software codesign; heuristic programming; microprocessor chips; optimising compilers; FACSE; adapted heuristics; compilation space exploration; compiler optimization; next processor generations; rapid evaluation methods; Application software; Computer architecture; Hardware; Microelectronics; Network-on-a-chip; Program processors; Software performance; Space exploration; Testing; Transistors; Architecture; exploration; optimization; processors; simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on

Conference_Location

Rabat

Print_ISBN

978-1-4244-1277-8

Electronic_ISBN

978-1-4244-1278-5

Type

conf

DOI

10.1109/DTIS.2007.4449531

Filename

4449531