Title :
High level area estimation of custom instructions for FPGA-based reconfigurable processors
Author :
Lam, Siew-Kei ; Li, Wen ; Srikanthan, Thambipillai
Author_Institution :
Nanyang Technol. Univ., Singapore
Abstract :
Reconfigurable processors provide an attractive means to meet the constraints of embedded devices due to their instruction set extension capabilities. We propose a novel technique to estimate the area utilization of LUT (Look-Up Table) based FPGAs (Field Programmable Gate Arrays) for custom instruction realizations. The technique contributes to rapid design exploration by computing the hardware area utilization of custom instructions without actual hardware synthesis. The proposed area estimation technique is achieved in two stages. In the first stage, a set of partitions are obtained from the custom instruction data-paths based on some rule-sets that satisfy the FPGA constraints. Each partition represents a unique LUT configuration that can be implemented on a FPGA logic element. In the second stage, the partitions are combined to maximize the area efficiency on FPGA. We show that the proposed technique can overcome the limitation of existing datapath merging methods that are based on maximizing resource sharing. Experimental results show that an average of 12 unique LUT configurations (about 22% of the logic elements in the smallest Xilinx Virtex FPGA) can sufficiently cater to seven applications from the MiBench benchmark suite.
Keywords :
embedded systems; field programmable gate arrays; instruction sets; logic partitioning; merging; microprocessor chips; reconfigurable architectures; system-on-chip; table lookup; FPGA; custom instruction; datapath merging; embedded device; field programmable gate array; high level area estimation; logic partition; look-up table; reconfigurable processor; resource sharing; system-on-chip; Application software; Embedded system; Field programmable gate arrays; Hardware; Merging; Reconfigurable logic; Resource management; System-on-a-chip; Table lookup; Time to market; Custom instruction; LUT; data-path merging;
Conference_Titel :
Information, Communications & Signal Processing, 2007 6th International Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-0982-2
Electronic_ISBN :
978-1-4244-0983-9
DOI :
10.1109/ICICS.2007.4449544