DocumentCode :
2971932
Title :
A Smart Load-Pull Method to Safely Reach Optimal Matching Impedances of Power Transistors
Author :
Reveyrand, T. ; Gasseling, T. ; Barataud, D. ; Mons, S. ; Nébus, J-M
Author_Institution :
UMR CNRS 6172, Limoges
fYear :
2007
fDate :
3-8 June 2007
Firstpage :
1489
Lastpage :
1492
Abstract :
This paper presents a new method to find optimal load impedances of power transistors with a VNA based Load-Pull measurement setup. Most of load pull setups find the optimal load impedance of a device under test (DUT) for a given available input power. If the optimal impedance must satisfy a trade off between several parameters, such as gain compression or power added efficiency, the measurement procedure may become very time consuming. Our method automatically generates a behavioral model of the DUT. Crossing-informations from this model and measurements lead us to the good impedance optimum with a limited number of iterations.
Keywords :
electric impedance measurement; impedance matching; power transistors; testing; device under test; gain compression; load-pull measurement; optimal load impedances; optimal matching impedances; power added efficiency; power transistors; smart load-pull method; Calibration; Impedance measurement; Microwave devices; Optimal matching; Power measurement; Power system modeling; Power transistors; Semiconductor device measurement; Time measurement; Tuners; Impedance matching; microwave measurements; modeling; semiconductor device measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium, 2007. IEEE/MTT-S International
Conference_Location :
Honolulu, HI
ISSN :
0149-645X
Print_ISBN :
1-4244-0688-9
Electronic_ISBN :
0149-645X
Type :
conf
DOI :
10.1109/MWSYM.2007.380535
Filename :
4264122
Link To Document :
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