DocumentCode :
2973334
Title :
Making domain-specific hardware synthesis tools cost-efficient
Author :
George, Nivia ; Novo, David ; Rompf, Tiark ; Odersky, Martin ; Ienne, Paolo
fYear :
2013
fDate :
9-11 Dec. 2013
Firstpage :
120
Lastpage :
127
Abstract :
Tools to design hardware at a high level of abstraction promise software-like productivity for hardware designs. Among them, tools like Spiral, HDL Coder, Optimus and MMAlpha target specific application domains and produce highly efficient implementations from high-level input specifications in a Domain Specific Language (DSL). But, developing similar domain-specific High-Level Synthesis (HLS) tools need enormous effort, which might offset their many advantages. In this paper, we propose a novel, cost-effective approach to develop domain-specific HLS tools. We develop the HLS tool by embedding its input DSL in Scala and using Lightweight Modular Staging (LMS), a compiler framework written in Scala, to perform optimizations at different abstraction levels. For example, to optimize computation on matrices, some optimizations are more effective when the program is represented at the level of matrices while others are better applied at the level of individual matrix elements. To illustrate the proposed approach, we create an HLS flow to automatically generate efficient hardware implementations of matrix expressions described in our own high-level specification language. Although a simple example, it shows how easy it is to reuse modules across different HLS flows and to integrate our flow with existing tools like LegUp, a C-to-RTL compiler, and FloPoCo, an arithmetic core generator. The results reveal that our approach can simultaneously achieve high productivity and design quality with a very reasonable tool development effort.
Keywords :
circuit CAD; digital arithmetic; field programmable gate arrays; high level synthesis; matrix algebra; program compilers; specification languages; C-to-RTL compiler; DSL; FPGA; FloPoCo; HDL coder; HLS; LMS; LegUp; MMAlpha; Optimus; Scala; Spiral; arithmetic core generator; compiler framework; cost-efficiency; design quality; domain specific language; domain-specific hardware synthesis tools; domain-specific high-level synthesis tools; hardware design; hardware designs; high abstraction level; high-level specification language; lightweight modular staging; matrix computation optimizations; matrix expressions; software-like productivity; Adders; DSL; Generators; Hardware; Least squares approximations; Matrices; Optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology (FPT), 2013 International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-2199-7
Type :
conf
DOI :
10.1109/FPT.2013.6718341
Filename :
6718341
Link To Document :
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