Flexible hierarchy ray tracing on FPGAs

Rendering programs use ray tracing to artificially create photo-realistic scenes that would otherwise be too dangerous, too costly or physically impossible to fabricate. Acceleration of the rendering process can be achieved through spatial or object hierarchy structures, which aim to restrict the number of expensive ray-object intersection calculations along a ray path by trading them for traversal of the structure. With extensive inherent parallelism, ray tracing benefits from GPU acceleration but may also benefit from the more flexible control flow and memory architecture available with FPGAs. We present a flexible FPGA based ray tracing platform capable of traversing varying widths and types of acceleration hierarchies to evaluate their efficiency. The platform consists of four main controllers for communication, traversal, intersection and memory. The platform interfaces with LuxRays, an open-source C++ renderer, over PCIexpress to transfer data for computation to onboard memory. We implement a configuration of the platform at 250MHz on our target device that shows promising results compared to CPU and GPU renders.