Title :
A prototyping system for hardware distributed objects with diversity of programming languages design and preliminary evaluation
Author :
Ohkawa, Takeshi ; Yokota, Tomoyuki ; Ootsu, Kanemitsu
Author_Institution :
Grad. Sch. of Eng., Utsunomiya Univ., Utsunomiya, Japan
Abstract :
A prototyping system for hardware distributed objects using a hardwired ORB (Object Request Broker) protocol processing engine was implemented on Xilinx Zynq-7000 platform; by which a circuit IP on an FPGA can be operated from application software on Linux/ARM processor through an object-oriented method call. The proposed framework increases controllability and design-productivity on FPGA-based systems. A developer can define an object-oriented interface for a circuit IP in an FPGA, and implement the control sequence part using JavaRock Java-to-HDL synthesizer. By the conformance to the standard CORBA (Common Object Request Broker Architecture) protocol, circuit IPs in an FPGA can be handled through object-oriented interface from diversity of programing languages; like C++, Java, Python and so on. The round trip delay performance measurement of the prototype system was done on Xillybus FIFO interface channel.
Keywords :
C++ language; Java; distributed object management; field programmable gate arrays; hardware description languages; logic circuits; logic design; object-oriented programming; remote procedure calls; C++ language; CORBA protocol; Common Object Request Broker Architecture; FPGA-based system; Java language; JavaRock Java-to-HDL synthesizer; Linux-ARM processor; Object Request Broker protocol processing engine; Python; Xilinx Zynq-7000 platform; Xillybus FIFO interface channeldistributed o; application software; circuit IP; control sequence; controllability; design productivity; hardware distributed objects; hardwired ORB protocol processing engine; object-oriented interface; object-oriented method call; programming languages design; prototyping system; remote method call; round trip delay performance measurement; Delays; Engines; Field programmable gate arrays; Hardware; Java; Protocols; embedded applications; hardware/software co-design; high-level synthesis; intellectual property core based design; languages and modeling techniques;
Conference_Titel :
Field-Programmable Technology (FPT), 2013 International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-2199-7
DOI :
10.1109/FPT.2013.6718418