A bus-based modular approach to designing a large scale ATM switch

Switching systems of the future will likely require a capacity of over a thousand 155 Mbps lines, and they should be expandable in terms of the number of ports to accommodate the increased demand. From a practical point of view, port scalability of ATM switches emerges as an important issue while complexity and performance of the switches have been major issues in the switch design. In this paper, we present a switch module consisting of several input/output ports, a shared buffer switch, and the bus interface. These modules are interconnected by a high-speed bus. The proposed ATM switch is scalable in the sense that additional switch modules can be added easily since the modules are operated without a bus contention in our approach. The degree of scalability is limited only by the fixed interconnect bandwidth of the shared bus. It is shown that the proposed approach provides a maximum switch throughput of 100% under uniform random traffic. We also show that its performance in cell loss and cell latency is comparable to that of the output buffer switch which provides the best performance by employing the speed up of internal operations