• DocumentCode
    2976257
  • Title

    H.264/AVC Video Encoder Implementation Based on TI TMS320DM642

  • Author

    Wang, Hong-Jun ; Huang, Yong-Jian ; Li, Hua

  • Author_Institution
    Shandong University, China
  • fYear
    2006
  • fDate
    Dec. 2006
  • Firstpage
    503
  • Lastpage
    506
  • Abstract
    Compared with the previous standards, the coding efficiency and coding performance of H.264/AVC are improved at the cost of higher computational complexity. It is a big challenge for us to develop the embedded real-time H.264/AVC video encoder with the limited on-chip memory space. This paper introduces the method to develop and optimize the H.264/AVC "baseline\´ encoder on the TMS320DM642 DSP hardware platform. The emphasis is put on the optimization methods of memory space allocation, the strategy of data transfer and pixel interpolation in motion compensation. Hereinto, ping-pong buffering technique was used to optimize the input interface of H.264/AVC encoder and the bi-linear interpolation method was used to replace the 6-tap filter which has been adopted in the "x264" source program. Experiments show that the coding performance of the optimized encoder is improved effectively with a little loss in PSNR and video sequences with QCIF resolution can be encoded in real time.
  • Keywords
    Automatic voltage control; Computational complexity; Computational efficiency; Digital signal processing; Filters; Hardware; Interpolation; Motion compensation; Optimization methods; Performance loss;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Information Hiding and Multimedia Signal Processing, 2006. IIH-MSP '06. International Conference on
  • Conference_Location
    Pasadena, CA, USA
  • Print_ISBN
    0-7695-2745-0
  • Type

    conf

  • DOI
    10.1109/IIH-MSP.2006.265051
  • Filename
    4041771