Cost issues for chip scale packaging

The IC industry amounted to $140 billion worldwide in 1996. As the consumer and portable electronics portion of this market grows, so will. The demand for component packaging that meets higher density requirements. Chip scale packaging (CSP) addresses this need, but many technology variations exist, creating confusion among potential users about which technology may suit their application. Comparing alternative packaging technologies is a complex task, involving a prioritization of cost, performance, and business strategy issues. This paper focuses only one portion of the decision-making equation: cost. Using a tool for assessing the manufacturing cost of electronic packaging, IBIS has analyzed the cost outlook for several chip scale packaging technologies, including wafer-scale processing as well as individual component packaging. This paper examines the costs for both implementations, analyzing their cost sensitivity to product design variables (i.e., # of I/Os per IC and lead pitch) and manufacturing conditions (i.e., annual production volume and yield)