Title :
35-nm-Gate In0.7Ga0.3As/In0.52Al0.48As HEMT with 520-GHz fT
Author :
Watanabe, Issei ; Endoh, Akira ; Mimura, Takashi ; Matsui, Toshiaki
Author_Institution :
Nat. Inst. of Inf. & Commun. Technol., Tokyo
Abstract :
We fabricated a 35-nm-gate In0.7Ga0.3As/In0.52Al0.48As high electron mobility transistor by using a simple, self-aligned one-step-recessed gate procedure. An extrinsic maximum transconductance (gm_max) of 1.7 S/mm and a current gain cutoff frequency (fT) of 520 GHz were achieved at room temperature. This significantly high fT was obtained by reducing the gate length to 35 nm and using an epitaxial structure with a 3-nm-thick InAlAs spacer layer, a 6-nm-thick InAlAs Schottky barrier layer and a 2-nm-thick InP etching stopper layer to decrease the gate-to-channel distance to 8 nm, and form simultaneously 50-nm-long side-recess structures and T-shaped gates stacked on the InAlAs Schottky barrier layer. These results are the first experimental achievement of fT as high as 520 GHz by using the one-step-recessed gate procedure.
Keywords :
epitaxial layers; high electron mobility transistors; InGaAs-InAlAs; Schottky barrier layer; current gain cutoff frequency; distance 8 nm; epitaxial structure; etching stopper layer; extrinsic maximum transconductance; frequency 520 GHz; high electron mobility transistor; one-step-recessed gate procedure; size 2 nm; size 3 nm; size 35 nm; size 50 nm; size 6 nm; spacer layer; Cutoff frequency; Etching; HEMTs; Indium compounds; Indium phosphide; Lithography; MOCVD; MODFETs; Schottky barriers; Transconductance; InGaAs/InAlAs; InP; cutoff frequency (fT); high electron mobility transistor (HEMT); one-step-recessed gate procedure; transconductance (gm);
Conference_Titel :
Indium Phosphide & Related Materials, 2007. IPRM '07. IEEE 19th International Conference on
Conference_Location :
Matsue
Print_ISBN :
1-4244-0875-X
Electronic_ISBN :
1092-8669
DOI :
10.1109/ICIPRM.2007.380681