DocumentCode :
2977597
Title :
Serialization-Aware Mini-Graphs: Performance with Fewer Resources
Author :
Bracy, Anne ; Roth, Amir
Author_Institution :
Dept. of Comput. & Inf. Sci., Pennsylvania Univ., Philadelphia, PA
fYear :
2006
fDate :
Dec. 2006
Firstpage :
171
Lastpage :
184
Abstract :
Instruction aggregation - the grouping of multiple operations into a single processing unit - is a technique that has recently been used to amplify the bandwidth and capacity of critical processor structures. This amplification can be used to improve IPC or to maintain IPC while reducing physical resources. Mini-graph processing is a particular instruction aggregation technique that targets dynamically-scheduled superscalar processors and achieves bandwidth and capacity amplification throughout the pipeline. The dark side of aggregation is serialization. External serialization is an effect common to many aggregation schemes. An aggregate cannot issue until all of its external inputs are ready. If the last-arriving input to an aggregate feeds what is not the first instruction, the entire aggregate can be delayed. Mini-graphs additionally suffer from internal serialization. Serialization can degrade performance, sometimes to the point of overwhelming the benefits of aggregation. This paper examines the problem of serialization and serialization-aware aggregation in the context of mini-graphs. An aggressive mini-graph selection scheme that seeks to maximize amplification, produces amplification rates of 38% but, due to serialization, cannot use them to compensate for a 33% reduction in physical resources (i.e., a reduction from 4-way issue to 3-way issue). A conservative selection scheme that avoids serialization by static inspection produces amplification rates of only 20%, making a performance neutral reduction in resources virtually impossible. To reconcile the seemingly conflicting goals of resource amplification and serialization avoidance, this paper develops three schemes that identify and reject mini-graphs with harmful serialization. The most effective of these, slack-profile, uses local slack profiles to reject mini-graphs whose estimated delay cannot be absorbed by the rest of the program. Slack-profile virtually eliminates serialization-induced slowdowns wh- ile providing 34% amplification rates. A 3-way issue processor augmented with slack-profile mini-graphs outperforms a 4-way issue processor by an average of 2%
Keywords :
data flow graphs; dynamic scheduling; processor scheduling; conservative selection scheme; dynamically-scheduled superscalar processor; instruction aggregation; resource amplification; serialization-aware mini-graph; slack profile; static inspection; Aggregates; Bandwidth; Computer aided instruction; Degradation; Delay effects; Delay estimation; Feeds; Information science; Inspection; Pipelines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International Symposium on
Conference_Location :
Orlando, FL
ISSN :
1072-4451
Print_ISBN :
0-7695-2732-9
Type :
conf
DOI :
10.1109/MICRO.2006.45
Filename :
4041845
Link To Document :
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