• DocumentCode
    2977621
  • Title

    Analyzing thermal runaway in semiconductor devices using the constrained method of optimization

  • Author

    Lakshminarayanan, Vasudevan ; Sriraam, N.

  • Author_Institution
    Centre for Dev. of Telematics, Bangalore, India
  • fYear
    2013
  • fDate
    27-28 Dec. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Thermal runaway is a major cause of failure of semiconductor devices in electronic systems. Analyzing the conditions for thermal runaway and its prevention is important to prevent this failure mechanism. In this paper, the Lagrange´s constrained method of optimization is applied to the problem of thermal runaway. Cases of thermal runaway in MOSFET,BJT and semiconductor ICs are discussed. A case of power generation and dissipation represented by a quadratic function in two-variables is taken as an example and the method of application is explained. The geometrical interpretation of the mathematical results is also discussed. Methods of prevention of thermal runaway in a few types of semiconductor components are given.
  • Keywords
    MOSFET; bipolar transistors; failure analysis; optimisation; semiconductor device reliability; thermal analysis; BJT; Lagrange constrained optimization method; MOSFET; electronic systems; power dissipation; power generation; quadratic function; semiconductor IC; semiconductor components; semiconductor device failure mechanism; thermal runaway analysis; Equations; Junctions; Power dissipation; Thermal resistance; Thermal stability; Constrained Optimization; Electrical Overstress (EOS); Lagrange´s Method; Perturbation; Stability; Thermal runaway; Zero Temperature Coefficient;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits, Controls and Communications (CCUBE), 2013 International conference on
  • Conference_Location
    Bengaluru
  • Print_ISBN
    978-1-4799-1599-6
  • Type

    conf

  • DOI
    10.1109/CCUBE.2013.6718563
  • Filename
    6718563