• DocumentCode
    2977760
  • Title

    NoSQ: Store-Load Communication without a Store Queue

  • Author

    Sha, Tingting ; Martin, Milo M K ; Roth, Amir

  • Author_Institution
    Dept. of Comput. & Inf. Sci., Pennsylvania Univ., Philadelphia, PA
  • fYear
    2006
  • fDate
    9-13 Dec. 2006
  • Firstpage
    285
  • Lastpage
    296
  • Abstract
    This paper presents NoSQ (short for no store queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the out-of-order engine. NoSQ implements store-load communication using speculative memory bypassing (SMB), the dynamic short-circuiting of DEF-store-load-USE chains to DEF-USE chains. Whereas previous proposals used SMB as an opportunistic complement to conventional store queue-based forwarding, NoSQ uses SMB as a store queue replacement. NoSQ relies on two supporting mechanisms. The first is an advanced store-load bypassing predictor that for a given dynamic load can predict whether that load will bypass and the identity of the communicating store. The second is an efficient verification mechanism for both bypassed and non-bpyassed loads using in-order load re-execution with an SMB-aware store vulnerability window (SVW) filter. The primary benefit of NoSQ is a simple, fast datapath that does not contain store-load forwarding hardware; all loads get their values either from the data cache or from the register file. Experiments show that this simpler design - despite being more speculative - slightly outperforms a conventional store-queue based design on most benchmarks (by 2% on average)
  • Keywords
    parallel programming; processor scheduling; program compilers; storage management; DEF-store-load-USE chains; NoSQ microarchitecture; SMB-aware store vulnerability window; SVW filter; dynamic load; in-order load re-execution; speculative memory bypassing; store queue; store-load bypassing predictor; store-load communication; verification mechanism; Engines; Filters; Hardware; Information science; Microarchitecture; Out of order; Pipelines; Proposals; Registers; Scalability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International Symposium on
  • Conference_Location
    Orlando, FL
  • ISSN
    1072-4451
  • Print_ISBN
    0-7695-2732-9
  • Type

    conf

  • DOI
    10.1109/MICRO.2006.39
  • Filename
    4041854