DocumentCode
2978013
Title
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
Author
Cho, Sangyeun ; Jin, Lei
Author_Institution
Dept. of Comput. Sci., Pittsburgh Univ., PA
fYear
2006
fDate
Dec. 2006
Firstpage
455
Lastpage
468
Abstract
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multicore processor design aspect to overcome non-uniform cache access latency for good program performance and to reduce on-chip network traffic and related power consumption. Unlike previously studied hardware-based private and shared cache designs implementing a "fixed" caching policy, the proposed OS-micro architecture approach is flexible; it can easily implement a wide spectrum of L2 caching policies without complex hardware support. Furthermore, our approach can provide differentiated execution environment to running programs by dynamically controlling data placement and cache sharing degrees. We discuss key design issues of the proposed approach and present preliminary experimental results showing the promise of our approach
Keywords
cache storage; microprocessor chips; multiprocessing systems; storage allocation; OS-level page allocation; OS-micro architecture; distributed L2 cache management; multicore processor design; Bandwidth; Computer science; Delay; Design optimization; Equations; Hardware; Multicore processing; Network-on-a-chip; Telecommunication traffic; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International Symposium on
Conference_Location
Orlando, FL
ISSN
1072-4451
Print_ISBN
0-7695-2732-9
Type
conf
DOI
10.1109/MICRO.2006.31
Filename
4041868
Link To Document