DocumentCode :
2978465
Title :
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling
Author :
Schrik, E. ; Dewilde, P.M. ; van der Meijs, N.P.
Author_Institution :
DIMES, Delft Univ. of Technol., Netherlands
fYear :
2002
fDate :
10-14 Nov. 2002
Firstpage :
10
Lastpage :
15
Abstract :
In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properties of the substrate as a noise-propagator is becoming ever more important. A model can be obtained through the finite element method (FEM) or the boundary element method (BEM). The FEM performs a full 3D discretization of the substrate, which makes this method very accurate and flexible but also slow. The BEM only discretizes the contact areas on the boundary of the substrate, which makes it less flexible, but significantly faster. A combination between BEM and FEM can be efficient when we need flexibility and speed at the same time. This paper briefly describes the BEM and the FEM and their combination, but mainly concentrates on the theoretical validation of the combined method and the experimental verification through implementation in the SPACE layout to circuit extractor and comparison with commercial BEM and FEM tools.
Keywords :
boundary-elements methods; circuit layout CAD; computational complexity; electric resistance; finite element analysis; integrated circuit layout; integrated circuit modelling; integrated circuit noise; 3D substrate discretization; BEM tools; FEM tools; SPACE layout to circuit extractor; analog part functionality; boundary contact areas discretization; boundary element method; combined BEM/FEM substrate resistance modeling; digital part substrate noise; finite element method; mixed-signal designs; model flexibility; model speed; noise-propagator; substrate modeling; Boundary element methods; Circuit noise; Circuit optimization; Circuits and systems; Convergence; Doping; Finite element methods; Fluctuations; Noise figure; Semiconductor process modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
ISSN :
1092-3152
Print_ISBN :
0-7803-7607-2
Type :
conf
DOI :
10.1109/ICCAD.2002.1167507
Filename :
1167507
Link To Document :
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