DocumentCode

2978532

Title

An Architecture Of A Dataflow Single Chip Processor

Author

Sakai, Shuichi ; Yamaguchi, Yoshinori ; Hiraki, Kei ; Kodama, Yuetsu ; Yuba, Toshitsugu

Author_Institution

Electrotechnical Laboratory

fYear

1989

fDate

28 May-1 Jun 1989

Firstpage

46

Lastpage

53

Keywords

Computer architecture; Concurrent computing; Costs; Hardware; High performance computing; Laboratories; Parallel machines; Permission; Pipelines; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Architecture, 1989. The 16th Annual International Symposium on

ISSN

1063-6897

Print_ISBN

0-8186-8948-X

Type

conf

DOI

10.1109/ISCA.1989.714523

Filename

714523