A highly reliable 1T1C 1 Mb FRAM with novel ferro-programmable redundancy scheme

Author

Ohno, C. ; Yamazaki, Hiroshi ; Suzuki, Hajime ; Nagai, E. ; Miyazawa, H. ; Saigoh, K. ; Yamazaki, Tsutomu ; Chung, Yueh-Ting ; Kraus, Werner ; Varhaeghe, D. ; Argos, G. ; Walbert, J. ; Mitra, Subhasish

Author_Institution

Fujitsu Labs. Ltd., Tokyo, Japan

fYear

2001

fDate

7-7 Feb. 2001

Firstpage

36

Lastpage

37

Abstract

Two key design techniques improve margins of the 1T1C, 1 Mb FeRAM. One is a redundancy scheme utilizing the same ferroelectric capacitor as used in the memory cell, which can be implemented without additional process steps. The other is an externally controllable dummy cell reference that mimics memory cell properties and also finds weak cells prior to repair.

Keywords

cellular arrays; ferroelectric capacitors; ferroelectric storage; integrated circuit design; random-access storage; redundancy; 1 Mbit; FRAM; design techniques; externally controllable dummy cell reference; ferro-programmable redundancy scheme; ferroelectric capacitor; memory cell properties; weak cells; Capacitors; Circuits; Ferroelectric films; Ferroelectric materials; Nonvolatile memory; Random access memory; Redundancy; Springs; Testing; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-6608-5

Type

conf

DOI

10.1109/ISSCC.2001.912422

Filename

912422