Title :
Design optimization for asymmetrical half-bridge converters
Author :
Liang, Jim H. ; Wang, Po-Chueh ; Huang, Kuo-Chien ; Chen, Chern-Lin ; Leu, Yi-Hsin ; Chen, Tsuo-Mim
Abstract :
A zero-voltage switching (ZVS) technique employing a resonant-transition during a switching interval has been explored for many years. To ensure ZVS operation, two approaches were frequently chosen, separately or mixed. One is to have enough gap on the main core. The other is to add an external inductor in series with the main transformer. However, both approaches suffer from the parasitic ringing phenomena in the practical circuit. The parasitic ringing is generated by the leakage inductance/external inductor and the stray capacitance seen from the transformer primary winding. It introduces additional losses and EMI noise. To alleviate these problems, a ring-free mechanism is proposed. It can apply to most of the conventional zero-voltage switching topologies. The asymmetrical half-bridge converter with this mechanism is presented here. With 94% efficiency and 6 dB improvement on conducted EMI measurement were recorded using an offline 24 V/5 A prototype
Keywords :
bridge circuits; circuit optimisation; power transformers; resonant power convertors; switching circuits; transformer windings; 24 V; 5 A; 94 percent; ZVS; asymmetrical half-bridge converters; conducted EMI measurement; design optimisation; external inductor; leakage inductance; parasitic ringing; ring-free mechanism; stray capacitance; switching interval resonant transition; transformer; transformer primary winding; zero-voltage switching; Circuit noise; Circuit topology; Design optimization; Electromagnetic interference; Inductance; Inductors; Parasitic capacitance; Resonance; Transformer cores; Zero voltage switching;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 2001. APEC 2001. Sixteenth Annual IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
0-7803-6618-2
DOI :
10.1109/APEC.2001.912445