Title :
Circuit power estimation using pattern recognition techniques
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
Abstract :
This paper proposes a circuit power estimation method using Bayesian inference and neural networks. Based on statistical distribution of circuit leakage power and switching energy, the entire state and transition space of a circuit are classified using neural networks into a limited few classes that represent different power consumption average values. This technique enables efficient table-lookup of circuit power of the entire state and transition space. Theoretical basis of Bayesian inference, feature extraction for neural networks of circuit leakage power and switching energy are discussed. Experiments on a wide range of circuit topologies demonstrated the robustness of the proposed method for estimating circuit leakage power of all possible states and switching energy of all possible transitions.
Keywords :
Bayes methods; VLSI; circuit analysis computing; feature extraction; low-power electronics; neural nets; state-space methods; table lookup; Bayesian inference; circuit leakage power; circuit power estimation method; feature extraction; neural networks; pattern recognition techniques; power consumption average values; state space; statistical distribution; switching energy; table-lookup; transition space; Bayesian methods; Circuit topology; Energy consumption; Feature extraction; Neural networks; Pattern recognition; Robustness; State estimation; Statistical distributions; Switching circuits;
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
Print_ISBN :
0-7803-7607-2
DOI :
10.1109/ICCAD.2002.1167566